general ideaThis idea works under the assumption that the erasure process of an old UV-erasable EPROM is somewhat randomized, in that all bits are not reset instantaneously at the same time, but randomly distributed during the erasure process.
The length of time necssary for full erasure would depend on the light levels, so by controlling the lighting, by adding light sources and/or filtering naturally present light, the time neccesary for the data written to anprotected EPROM to spontaneously decay fully can be controlled. This decay can be visualized by iterating over the stored data and showing the data on e.g. a LED matrix display.
Thus once we manage to upload our minds to megacomputers or finally create true AI that takes over the world, we can still humble ourselves or motivate the resistance, with that there is still no such thing as guaranteed true immortality.
basic implementationAs an electronics guy I think it is quite important that this is not implemented with microcontrollers; the decay of digitally stored data is the core concept the device is based on, so building it with something with a program memory would dimnish the effect.
So the core setup would be an oscillator driving the (first) counter's clock input, with the counter value output feeding the address lines of the EPROM as well as the rows of the matrix. Deciding about which counter bits to feed to the address lines and row lines respectively, and how these should overlap, determines the display effect.
Basically, if high (=slowly changing) bits are chosen for the adress lines, while lower, faster, bits are driving the rows, the display will be drawing the same pattern will be drawn on multiple rows, while if the opposite is done, multiple data cells are drawn on the same row, within a short interval. The first alternative creates a slowly, but momentarily changing pattern that fails to fully take advantage of the 2D aspect of the matrix. The latter alternative creates a pattern with multiple brightness levels and/or flicker depending on what the data values are that are written to the same row.
The correct solution does probably include mixing and interleaving both alternatives a bit, but the exact mix is best determined experimentally.
advanced implementationIt would be nice to make the device able to run indefinitely (given power) without having to switch out and reprogram the EPROM every time it has been fully cleared, even if one could consider this contrary to the point that the device is trying to make.
To reach that goal it would be necessary to 1) detect if any data is still left at any address, and 2) invoke a programming cycle once the condition has been detected.
#1 should be easy enough to implement, by combining the EPROM data lines with logic and feeding the result into an SR latch which is checked and reset at most once every loop. If the addressing counter value output is wider than the EPROM address, one could easily tie the check and reset events to specific values that are one bit wider than the address. This has the benefit of not having to implement the edge case(s) of doing the check + reset cycle and at the same time care what the data looks like, since the data at those addresses will have been checked already at an earlier point in time.
#2 puts some requirements on the components that talk to the EPROM directly as programming voltages are likely different from the read only voltages.
But apart from that, the programming circuit would be somewhat similar to the rest of the logic described so far, just that it runs once only, instead of looping, as well as possibly running at a different speed.